中央大学 理工学部 電気電子情報通信工学科
 中央大学 大学院理工学研究科 電気電子情報通信工学専攻 竹内研究室

Publications
International Conference Journal Book United States Patents
Japanese Patents European Patents German Patents Korean Patents
Taiwan Patents Domestic Conference Review Media
International Conference
Yoshiaki Deguchi, Atsuro Kobayashi, Hikaru Watanabe and Ken Takeuchi, "Flash Reliability Boost Huffman Coding (FRBH): Co-Optimization of Data Compression and VTH Distribution Modulation to Enhance Data-Retention Time by Over 2900x," IEEE Symposium on VLSI Technologies, June 2017.
Toshiki Nakamura, Yoshiaki Deguchi and Ken Takeuchi, “AEP-LDPC ECC with Error Dispersion Coding for Burst Error Reduction of 2D and 3D NAND Flash Memories,” IEEE International Memory Workshop (IMW), May 2017.
Yusuke Sugiyama, Tomoaki Yamada, Chihiro Matsui and Ken Takeuchi, “Reconfigurable SCM capacity Identification Method for SCM/NAND Flash Hybrid Disaggregated Storage,” IEEE International Memory Workshop (IMW), May 2017.
Atsuna Hayakawa, Kazuki Maeda, Shouhei Fukuyama, Hirofumi Takishita, Ryutaro Yasuhara, Satoshi Mishima and Ken Takeuchi, “Resolving Endurance and Program Time Trade-off of 40nm TaOx-based ReRAM by Co-optimizing Verify Cycles, Reset Voltage and ECC Strength,” IEEE International Memory Workshop (IMW), May 2017.
Kyoji Mizoguchi, Tomonori Takahashi, Seiichi Aritome, and Ken Takeuchi, “Data-Retention Characteristics Comparison of 2D and 3D TLC NAND Flash Memories,” IEEE International Memory Workshop (IMW), May 2017.
Yoshiaki Deguchi, Toshiki Nakamura, Atsuro Kobayashi and Ken Takeuchi, “12x Bit-Error Acceptable, 300x Extended Data-Retention Time, Value-Aware SSD with Vertical 3D-TLC NAND Flash Memories for Image Recognition,” IEEE Custom Integrated Circuits Conference (CICC), April 2017.
Tomoaki Yamada, Atsuya Suzuki, Yusuke Sugiyama, Chihiro Matsui and Ken Takeuchi, “Comprehensive Analysis on SCM Specifications for High-Performance SCM/NAND Flash Hybrid SSD with Through-Silicon Via,” International Conference on Electronics Packaging (ICEP), April 2017.
Yusuke Yamaga, Chihiro Matsui, Yukiya Sakaki, Atsuro Kobayashi and Ken Takeuchi, “Real Usage-based Precise Reliability Test by Extracting Read/Write/Retention-Mixed Real-life Access of NAND Flash Memory from System-level SSD Emulator,” IEEE International Reliability Physics Symposium (IRPS), April 2017.
Seiichi Aritome, Tomonori Takahashi, Kyoji Mizoguchi and Ken Takeuchi, “RTN Impact on Data-Retention Failure/Recovery in Scaled (~1Ynm) TLC NAND Flash Memories,” IEEE International Reliability Physics Symposium (IRPS), April 2017.
Kazuki Maeda, Shouhei Fukuyama, Ryutaro Yasuhara, Satoshi Mishima and Ken Takeuchi, “Error Recovery of Low Resistance State in 40nm TaOx-based ReRAM,” IEEE International Reliability Physics Symposium (IRPS), April 2017.
Atsuro Kobayashi, Hikaru Watanabe, Yukiya Sakaki, Seiichi Aritome and Ken Takeuchi, “Investigation of Read Disturb Error in 1Ynm NAND Flash Memories for System Level Solution,” IEEE International Reliability Physics Symposium (IRPS), April 2017.
Kota Tsurumi, Masahiro Tanaka and Ken Takeuchi, “0.6 V operation, 16 % Faster Set/Reset ReRAM Boost Converter with Adaptive Buffer Voltage for ReRAM and NAND Flash Hybrid Solid-State Drives,” International Symposium on Quality Electronic Design (ISQED), March 2017.
Toshiki Nakamura, Yoshiaki Deguchi, Atsuro Kobayashi and Ken Takeuchi, “Heterogeneous-Integrated LDPC ECC of TLC NAND Flash Memory for Read-Hot&Cold Mixed Data Storage,” Non-Volatile Memories Workshop (NVMW), March 2017.
Hirofumi Takishita, Yutaka Adachi and Ken Takeuchi, “ReRAM-based SSD Performance Considering Verify-program Cycles and ECC Capabilities,” Non-Volatile Memories Workshop (NVMW), March 2017.
Chihiro Matsui, Yusuke Yamaga, Yusuke Sugiyama and Ken Takeuchi, “8.9-times Performance Improvement by Tri-Hybrid Storage System with SCM and MLC/TLC NAND Flash Memory,” International Conference on Solid State Devices and Materials (SSDM), September 2016.
Yoshiaki Deguchi, Atsuro Kobayashi and Ken Takeuchi, “47% Data-Retention Error Reduction of TLC NAND Flash Memory by Introducing Stress Relaxation Period with Round-Robin Wearleveling,” International Conference on Solid State Devices and Materials (SSDM), September 2016.
Masahiro Tanaka, Kota Tsurumi, Tomoya Ishii and Ken Takeuchi, “Heterogeneously Integrated Program Voltage Generator for 1.0V Operation NAND Flash with Best Mix & Match of Standard CMOS Process and NAND Flash Process,” ESSCIRC-ESSDERC, September 2016.
Hiroki Yamazawa, Kazuki Maeda and, Tomoko Ogura Iwasaki and Ken Takeuchi, “Privacy-Protection SSD with Precision ECC and Crush Techniques for 15.5× Improved Data-Lifetime Control,” IEEE International Memory Workshop, May 2015.
Tsukasa Tokutomi and Ken Takeuchi, “17x Reliability Enhanced LDPC Code with Burst-Error Masking and High-Precision LLR for Highly Reliable Solid-State-Drives with TLC NAND Flash Memory,” IEEE International Memory Workshop, May 2015.
Yusuke Yamaga, Chihiro Matsui, Shogo Hachiya and Ken Takeuchi, “Application Optimized Adaptive ECC with Advanced LDPCs to Resolve Trade-off among Reliability, Performance, and Cost of Solid-State Drives,” IEEE International Memory Workshop, May 2015.
Yusuke Sugiyama, Tomoaki Yamada, Chihiro Matsui, Takahiro Onagi and Ken Takeuchi, “Application Dependency of 3-D Integrated Hybrid Solid-State Drive System with Through-Silicon Via Technology,” International Conference on Electronic Packageing (ICEP), April 2016.
Tomonori Takahashi, Senju Yamazaki and Ken Takeuchi, “Data-Retention Time Prediction of Long-term Archive SSD with Flexible-nLC NAND Flash,” IEEE International Reliability Physics Symposium (IRPS), April 2016.
Yoshiaki Deguchi, Tsukasa Tokutomi and Ken Takeuchi, “System-Level Error Correction by Read-Disturb Error Model of 1Xnm TLC NAND Flash Memory for Read-Intensive Enterprise Solid-State Drives (SSDs),” IEEE International Reliability Physics Symposium (IRPS), April 2016.
Yoshio Nakamura, Tomoko Iwasaki and Ken Takeuchi, “Machine Learning-Based Proactive Data Retention Error Screening in 1Xnm TLC NAND Flash,” IEEE International Reliability Physics Symposium (IRPS), April 2016.
Atsuro Kobayashi, Tsukasa Tokutomi and Ken Takeuchi, “Highly Reliable Techniques for TLC NAND Flash Memory,” 7th Non-Volatile Memories Workshop 2016 (NVMW), March 2016.
Ken Takeuchi, “Dependable Non-volatile Memory System,” IEEE Asian Solid-State Circuits Conference (A-SSCC) Tutorial, November 2015.【招待講演】
Tomoya Ishii, Shogo Hachiya, Sheyang Ning, Masahiro Tanaka and Ken Takeuchi, “0.6V Operation, 26% Smaller Voltage Ripple, 9% Energy Efficient Boost Converter with Adaptively Optimized Comparator Bias-Current for ReRAM Program in Low Power IoT Embedded Applications,” IEEE Asian Solid-State Circuits Conference (A-SSCC), November 2015.
Sheyang Ning, Tomoko Ogura Iwasaki, Eisuke Yanagizawa, Shogo Hachiya, Glen Rosendale, Monte Manning, Darlene Viviani, Thomas Rueckes and Ken Takeuchi, “Investigation of Carbon Nanotube Memory Cell Array Program Characteristics,” International Conference on Solid State Devices and Materials (SSDM), September 2015.
Masahiro Tanaka, Shogo Hachiya, Tomoya Ishii, Sheyang Ning and Ken Takeuchi, “A 1.0 V Operation, 65% Faster Set/Reset Voltage (3V) Generator for 3D-integrated ReRAM and NAND flash Hybrid Solid-State Drive,” International Conference on Solid State Devices and Materials (SSDM), September 2015.
Ken Takeuchi, “ReRAM for Storage Class Memory Application from Memory Architecture Perspective,” 5th International Workshop on Resistive Memories, September 2015. 【招待講演】
Shogo Hachiya, Takahiro Onagi, Sheyang Ning and Ken Takeuchi “Comprehensive Comparison of 3D-TSV Integrated Solid-State Drives (SSDs) with Storage Class Memory and NAND Flash Memory,” IEEE International Conference on 3D System Integration (3D IC), September 2015.
Atsuro Kobayashi, Tsukasa Tokutomi, Masafumi Doi, Shogo Hachiya, Shuhei Tanakamaru and Ken Takeuchi, “High Reliable SSDs for Enterprise Storage with Dynamic VTH Optimization and Auto Data Recovery,” Flash Memory Summit, August 2015.
Chao Sun, Asuka Arakawa, Ayumi Soga, Chihiro Matsui and Ken Takeuchi, “Middleware and Flash Translation Layer Co-Design for the Performance Boost of Solid-State Drives,”, Flash Memory Summit, August 2015.
Hirofumi Takishita, Sheyang Ning and Ken Takeuchi, “Trade-off of Performance, Reliability and Cost of SCM/NAND Flash Hybrid SSD,” Silicon Nanoelectronics Workshop(SNW), June 2015.
Senju Yamazaki, Shuhei Tanakamaru, Sakuya Suzuki, Tomoko Ogura Iwasaki, Shogo Hachiya and Ken Takeuchi, “Reliability Enhancement of 1Xnm TLC for Cold Flash and Millennium Memories,” IEEE Symp. on VLSI Technologies, June 2015.
Atsutake Kosuge, Junki Hashiba, Toru Kawajiri, So Hasegawa, Tsunaaki Shidei, Hiroki Ishikuro, Tadahiro Kuroda and Ken Takeuchi, “Inductively-Powered Wireless Solid-State Drive (SSD) System with Merged Error Correction of High-Speed Non-Contact Data Links and NAND Flash Memory,” IEEE Symp. on VLSI Circuits, June 2015.
Shuhei Tanakamaru, Hiroki Yamazawa and Ken Takeuchi, “Privacy-Protection Solid-State Storage (PP-SSS) System: Automatic Lifetime Management of Internet-Data’s Right to be Forgotten,” IEEE Symp. on VLSI Circuits, June 2015.
Shun Okamoto, Chao Sun, Shogo Hachiya, Tomoaki Yamada, Yusuke Saito, Tomoko Ogura Iwasaki and Ken Takeuchi, “Application Driven SCM&NAND Flash Hybrid SSD Design for Data-Centric Computing System,” IEEE International Memory Workshop, May 2015.
Chihiro Matsui, Asuka Arakawa, Chao Sun, Tomoko Ogura Iwasaki and Ken Takeuchi, “3x Faster Speed Solid-State Drive with a Write Order based Garbage Collection Scheme,” IEEE International Memory Workshop, May 2015.
Tomoko Ogura Iwasaki, Sheyang Ning, Hiroki Yamazawa, Chao Sun, Shuhei Tanakamaru and Ken Takeuchi, “Machine Learning Prediction for 13× Endurance Enhancement in ReRAM SSD System,” IEEE International Memory Workshop, May 2015.
Takahiro Onagi, Chao Sun and Ken Takeuchi, “Impact of Through-Silicon Via Technology on Energy Consumption of 3D-Integrated Solid-State Drive Systems,” International Conference on Electronic Packageing (ICEP), April 2015.
Takahiro Onagi, Chao Sun and Ken Takeuchi, “High Performance and Low Cost Design for All 3D-NAND Flash SSD,M-SCM/3D-NAND Flash Hybrid SSD and All S-SCM SSD,” 6th Non-Volatile Memories Workshop 2015 (NVMW) Poster, March 2015.
Asuka Arakawa, Chao Sun and Ken Takeuchi, “Database Storage Engine and SSD Controller Co-design for SSD Performance Enhancement and Energy Reduction,” 6th Non-Volatile Memories Workshop 2015 (NVMW) Poster, March 2015.
Tsukasa Tokutomi, Masafumi Doi, Shogo Hachiya, Atsuro Kobayashi, Shuhei Tanakamaru, and Ken Takeuchi, “Enterprise-Grade 6× Fast Read and 5× Highly Reliable SSD with TLC NAND-Flash Memory for Big-Data Storage,” IEEE International Solid-State Circuits Conference (ISSCC), February 2015.
Ken Takeuchi, “Memory system requirements for the big-data application data-centric computing,” IEEE International Solid-State Circuits Conference (ISSCC) Forum “Memory Trends: from big data to wearable devices”, February 2015. 【招待講演】
Tomoaki Yamada, Chao Sun and Ken Takeuchi, “A High-Performance Solid-State Drive by Garbage Collection Overhead Suppression,” IEEE Non-Volatile Memory Technology Symposium (NVMTS), October 2014.
Takahiro Onagi, Chao Sun and Ken Takeuchi, “Design Guidelines of All Storage Class Memory (SCM) SSD and Hybrid SCM/NAND Flash SSD to Balance Performance, Power, Endurance and Cost,” International Conference on Solid State Devices and Materials (SSDM), September 2014.
Shuhei Tanakamaru, Tsukasa Tokutomi and Ken Takeuchi, “Highly Reliable Storage System with Triple-Level Cell (TLC) NAND Flash Memories,” Flash Memory Summit, August 2014.
Hiroki Yamazawa, Sheyang Ning, Tomoko Ogura Iwasaki, Shuhei Tanakamaru, Koh Johguchi and Ken Takeuchi, “50 nm AlxOy ReRAM Array Retention Characteristics Before and After Endurance,” Silicon Nanoelectronics Workshop (SNW), June 2014.
Sheyang Ning, Tomoko Ogura Iwasaki, Kazuya Shimomura, Koh Johguchi, Glen Rosendale, Monte Manning, Darlene Viviani, Thomas Rueckes and Ken Takeuchi, “23% Faster Program and 40% Energy Reduction of Carbon Nanotube Non-volatile Memory with Over 10^11 Endurance,” IEEE Symp. on VLSI Technology, pp. 120-121, June 2014.
Shuhei Tanakamaru, Yuta Kitamura, Senju Yamazaki, Tsukasa Tokutomi and Ken Takeuchi, “Application-Aware Solid-State Drives (SSDs) with Adaptive Coding,” IEEE Symp. on VLSI Circuits, pp. 126-127, June 2014.
Chao Sun, Asuka Arakawa and Ken Takeuchi, “A Storage Engine Assisted SSD with Application-Coupled Simulation Platform,” ACM/EDAC/IEEE Design Automation Conference (DAC) Work-in-Progress Session, June 2014.
Ken Takeuchi, “Hybrid Solid-State Storage System with Storage Class Memory and NAND Flash Memory for Big-Data Application,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1046 - 1049, June 2014. 【招待講演】
Tsukasa Tokutomi, Shuhei Tanakamaru, Tomoko Ogura Iwasaki and Ken Takeuchi, “Advanced Error Prediction LDPC for High-Speed Reliable TLC NAND-based SSDs,” IEEE International Memory Workshop, pp. 99-102, May 2014.
Ayumi Soga, Chao Sun and Ken Takeuchi, “NAND Flash Aware Data Management System for High-Speed SSDs by Garbage Collection Overhead Suppression,” IEEE International Memory Workshop, pp. 95-98, May 2014.
Shuhei Tanakamaru, Shogo Hosaka, Koh Johguchi and Ken Takeuchi, “Performance and Reliability of NAND Flash/SCM Hybrid SSD during Write/Erase Cycling,” IEEE International Memory Workshop, pp. 154-157, May 2014.
Tomoya Ishii, Koh Johguchi and Ken Takeuchi, “Virtical and Horizontal Location Design of Program Voltage Generator for 3D-Integrated ReRAM/NAND Flash Hybrid SSD,” International Conference on Electronic Packageing (ICEP), pp. 113-116, April 2014.
Shun Okamoto, Chao Sun, Shogo Hachiya, Koh Johguchi, Kousuke Miyaji and Ken Takeuchi, “3D-Integrated Storage Class Memory/NAND Flash Hybrid SSDs for Cloud Data Centers,” 5th Non-Volatile Memories Workshop 2014 (NVMW) Poster, March 2014.
Shuhei Tanakamaru, Masafumi Doi and Ken Takeuchi, “Highly Reliable Techniques for NAND Flash Memory / ReRAM Hybrid Storage,” 5th Non-Volatile Memories Workshop 2014 (NVMW), March 2014.
Chao Sun, Ayumi Soga, Takahiro Onagi, Koh Johguchi and Ken Takeuchi, “A Workload-Aware-Design of 3D-NAND Flash Memory for Enterprise SSDs,” The International Symposium on Quality Electronic Design (ISQED), pp.554-561, March 2014.
Shuhei Tanakamaru, Hiroki Yamazawa, Tsukasa Tokutomi, Sheyang Ning and Ken Takeuchi, “Hybrid Storage of ReRAM/TLC NAND Flash with RAID-5/6 for Cloud Data Centers,” IEEE International Solid-State Circuits Conference (ISSCC), pp.335-338, February 2014.
Koh Johguchi, Toru Egami and Ken Takeuchi, “Low-Power Super-Lattice Phase-Change Memory without Melting and Write-Pulse Down Slope” Phase Change Oriented Science (PCOS), pp. 73-74, November 2013.
Koh Johguchi, Toru Egami, Koueuke Miyaji and Ken Takeuchi, “Write Voltage and Read Reference Current Generator for MLC-PCM Considering with Temperature Characteristics” Phase Change Oriented Science (PCOS), pp. 71-72, November 2013.
Ken Takeuchi, “Storage Class Memory & NAND Flash Memory Hybrid Solid-State Drives (SSD)” 224th Electrochemical Society Meeting (ECS) Transactions, vol. 58, no. 5, pp 3-8, October 2013. 【招待講演】
Kousuke Miyaji, Chao Sun and Ken Takeuchi, “Co-Design of Application Software and NAND Flash Memory for Database Storage System,” International Conference on Solid State Devices and Materials (SSDM), pp.130-131, September 2013.
Sheyang Ning, Tomoko Ogura Iwasaki and Ken Takeuchi, “Mb-Class Array Level Investigation of Program Verify Methods for AlxOy ReRAM,” International Conference on Solid State Devices and Materials (SSDM), pp.572-573, September 2013.
Shogo Hachiya, Koh Johguchi, Kousuke Miyaji and Ken Takeuchi, “TLC/MLC NAND Flash Mix-and-Match Design with Exchangeable Storage Array,” International Conference on Solid State Devices and Materials (SSDM), pp. 894-895, September 2013.
Toru Egami, Koh Johguchi, Senju Yamazaki and Ken Takeuchi, “Investigation of Multi-Level-Cell Operation with 2-Step SET Pulse and SET Operation on Super-Lattice Phase Change Memories,” International Conference on Solid State Devices and Materials (SSDM), pp. 548-549, September 2013.
Ken Takeuchi, “Scaling Challenges of NAND Flash Memory and Hybrid Memory System with Storage Class Memory & NAND flash memory,” IEEE Custom Integrated Circuits Conference (CICC), pp. 1-6, September 2013.【招待講演】
Tomoko Iwasaki, Hiroki Fujii, Kousuke Miyaji, Koh Johguchi, Kazuhide Higuchi, Chao Sun and Ken Takeuchi, “Hybrid ReRAM and MLC NAND SSD Memory System with Data Fragmentation Suppression,” Flash Memory Summit, August 2013.
Shuhei Tanakamaru, Masafumi Doi and Ken Takeuchi, “Unified Solid-State-Storage with NAND Flash Memory / ReRAM Hybrid Architecture,” Flash Memory Summit, August 2013.
Shuhei Tanakamaru, Yuki Yanagihara and Ken Takeuchi, “SSDs with Error-Prediction LDPC (EP-LDPC) and Error-Recovery Schemes,” Flash Memory Summit, August 2013.
Ken Takeuchi, “3D Hybrid SSD with Storage Class Memory and NAND Flash Memory for Big-Data Application,” IEEE Symp. on VLSI Circuits, Joint Rump Session, June 2013.【招待講演】
Ken Takeuchi, “Storage Class Memory and NAND Flash Memory Hybrid Solid-State Storage System for Big-Data Application,” IEEE Symp. on VLSI Circuits, Workshop, June 2013.【招待講演】
Masafumi Doi, Shuhei Tanakamaru and Ken Takeuchi, “An Optimum Asymmetric Coding Strategy to Improve Program-Disturb Error in 2X, 3X and 4Xnm NAND Flash Memories for Highly Reliable Enterprise Solid-State Drives (SSDs),” Silicon Nanoelectronics Workshop (SNW), pp.7-8, June 2013.
Koh Johguchi, Toru Egami, Kousuke Miyaji and Ken Takeuchi, “Write Voltage and Read Reference Current Generator for Multi-Level Ge2Sb2Te5-based Phase Change Memories with Temperature Characteristics Tracking,” IEEE International Memory Workshop, pp. 104-107, May 2013.
Sheyang Ning, Tomoko Ogura Iwasaki and Ken Takeuchi, “Write Stress Reduction in 50nm AlxOy ReRAM Improves Endurance 1.4× and Write Time, Energy by 17%,” IEEE International Memory Workshop, pp. 56-59, May 2013.
Tomoko Ogura Iwasaki, Sheyang Ning and Ken Takeuchi, “Stability Conditioning to Enhance Read Stability 10x in 50nm AlxOy ReRAM,” IEEE International Memory Workshop, pp. 44-47, May 2013.
Chao Sun, Kousuke Miyaji, Koh Johguchi, and Ken Takeuchi, “SCM Capacity and NAND Over-Provisioning Requirements for SCM/NAND Flash Hybrid Enterprise SSD,” IEEE International Memory Workshop, pp.64-67, May 2013.
Koh Johguchi, Toru Egami and Ken Takeuchi, “Highly Reliable, Low-Power Super-Lattice Phase-Change Memory without Melting and Write-Pulse Down Slope,” IEEE International Reliability Physics Symposium (IRPS), MY.5.1-MY.5.4, April 2013.
Kousuke Miyaji, Daisuke Kobayashi, Shinji Miyano and Ken Takeuchi, “Analysis on Static Noise Margin Improvement in 40nm 6T-SRAM with Post-Process Local Electron Injected Asymmetric Pass Gate Transistor,” IEEE International Reliability Physics Symposium (IRPS), 3B.6.1-3B.6.5, April 2013.
Shuhei Tanakamaru, Masafumi Doi and Ken Takeuchi, “Error-Prediction Analyses in 1X, 2X and 3Xnm NAND Flash Memories for System-Level Reliability Improvement of Solid-State Drives (SSDs),” IEEE International Reliability Physics Symposium (IRPS), 3B.3.1-3B.3.6, April 2013.
Ken Takeuchi, “Solid-State Drives (SSDs) with Flash Memories and Storage Class Memories,” IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT) and IEEE International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), April 2013.【招待講演】
Teruyoshi Hatanaka, Koh Johguchi and Ken Takeuchi, “Investigation of Program-Voltage Generator Integration for ReRAM and NAND Flash Memory Hybrid Three-Dimensional Solid-State Drive,” International Conference on Electronics Packaging, pp. 473-477, April 2013.
Shuhei Tanakamaru, Masafumi Doi and Ken Takeuchi, “Unified Solid-State Storage Architecture with NAND Flash Memory and ReRAM that Tolerates 32X Higher BER for Big-Data Applications,” IEEE International Solid-State Circuits Conference (ISSCC), pp.226-227, February 2013.
Chao Sun, Hiroki Fujii, Kousuke Miyaji, Koh Johguchi, Kazuhide Higuchi and Ken Takeuchi, “Over 10-times High-speed, Energy Efficient 3D TSV-Integrated Hybrid ReRAM/MLC NAND SSD by Intelligent Data Fragmentation Suppression,” 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013) University LSI Design Contest, January 2013.
Shuhei Tanakamaru, Yuki Yanagihara and Ken Takeuchi, “Highly Reliable Solid-State Drives (SSDs) with Error-Prediction LDPC (EP-LDPC) Architecture and Error-Recovery Scheme,” 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013) University LSI Design Contest, January 2013.
Ken Takeuchi, “Highly Reliable Signal Processing Technologies for Dependable Solid-State Drives (SSDs),” The 18th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC), pp. 21, November 2012.【招待講演】
Koh Johguchi, Kazuaki Yoshioka and Ken Takeuchi, “High Density NAND Phase Change Memory with Block-Erase Architecture and Investigations for Write and Disturb Requirements,” Phase Change Oriented Science (PCOS), pp. 36, November 2012.
Ken Takeuchi, “Hybrid Memory Architecture of PCM and NAND flash memories for Enterprise Storage ,” Phase Change Oriented Science (PCOS), pp. 21, November 2012.【招待講演】
Ken Takeuchi, “Signal Processing and Data Management Technologies for NAND&ReRAM Hybrid SSD ,” New Non-Volatile Memory Workshop 2012, pp. A2-1 - A2-37 November 2012.【招待講演】
Ken Takeuchi, “Variability and Failure Recovery of SRAM and Flash Memory,” IEEE/ACM Workshop on Variability Modeling and Characterization (VMC), November 2012.【招待講演】
Kousuke Miyaji, Koh Johguchi, Kazuhide Higuchi and Ken Takeuchi, “An Integrated Variable Positive/Negative Temperature Coefficient Read Reference Generator for MLC PCM/NAND Hybrid 3D SSD,” IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 313-316, November 2012.
Teruyoshi Hatanaka and Ken Takeuchi, “VSET/RESET and VPGM Generator without Boosting Dead Time for 3D-ReRAM and NAND flash Hybrid Solid-State Drives,” IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 309-312, November 2012.
Chao Sun, Kousuke Miyaji, Koh Johguchi and Ken Takeuchi, “x8 High Write-Throughput, 84% Write-Energy Saving, x6.5 Extended Lifetime Hybrid ReRAM/MLC NAND SSD with Cold Data Eviction Algorithm,” IEEE Non-Volatile Memory Technology Symposium (NVMTS), pp. 87-88, October 2012.
Ken Takeuchi, “Sophisticated Error Correction and Data Management Technologies for Storage Class Memory & NAND Flash Memory Hybrid Solid-State Drives (SSD),” IEEE Non-Volatile Memory Technology Symposium (NVMTS), pp. 49-50, October 2012.【招待講演】
Tomoko Ogura Iwasaki, Sheyang Ning and Ken Takeuchi, “Bipolar Read in ReRAM for 3x Write Speed and 5x Faster Read with Disturb Immunity,” International Conference on Solid State Devices and Materials (SSDM), pp. 642-643, September 2012.
Ken Takeuchi, “Application Perspectives for Storage Class Memory,” ITRS ERD (Emerging Research Device) Workshop on Emerging Architectures for Storage Class Memory, July 2012.【招待講演】
Ken Takeuchi, “System Solution for sub-10nm Flash Memories,” IEEE Symp. on VLSI Circuits, Joint Rump Session: Scaling Challenges Beyond 1x nm DRAM and NAND Flash, June 2012.【招待講演】
Hiroki Fujii, Kousuke Miyaji, Koh Johguchi, Kazuhide Higuchi, Chao Sun and Ken Takeuchi, “x11 Performance Increase, x6.9 Endurance Enhancement, 93% Energy Reduction of 3D TSV-Integrated Hybrid ReRAM/MLC NAND SSDs by Data Fragmentation Suppression,” IEEE Symp. on VLSI Circuits, pp.134-135, June 2012.
Kazuaki Yoshioka, Koh Johguchi and Ken Takeuchi, “High Density NAND Phase Change Memory with Block-Erase Architecture to Compromise Write and Disturb Requirements,” IEEE International Memory Workshop, May 2012.
Kazuhide Higuchi, Tomoko Ogura Iwasaki and Ken Takeuchi, “Investigation of Verify-Programming Methods to Achieve 10 Million Cycles for 50nm HfO2 ReRAM,” IEEE International Memory Workshop, May 2012.
Yuki Yanagihara, Kousuke Miyaji and Ken Takeuchi, “Control Gate Length, Spacing and Stacked Layer Number Design for 3D-Stackable NAND Flash Memory,” IEEE International Memory Workshop, May 2012.
Ken Takeuchi, “NAND & Controller Co-design for SSD,” IEEE International Memory Workshop Short Course, May 2012.【招待講演】
Ken Takeuchi, “Highly reliable low power Solid-State Drives (SSDs),” The 2012 International Meeting for Future of Electron Devices, Kansai (IMFEDK), May 2012.【招待講演】
Shuhei Tanakamaru, Chinglin Hung and Ken Takeuchi, “Asymmetric Coding and Stripe Pattern Elimination Algorithm for Highly Relialbe Low Power SSDs,” Workshop on Coding for Flash Memories, March 2012.
Kousuke Miyaji, Toshikazu Suzuki, Shinji Miyano and Ken Takeuchi, “A 6T-SRAM with a Carrier Injection Scheme to Pinpoint and Repair Fails that Achieves 57% Faster Read and 31% Lower Read Energy,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 232-233, February 2012.
Shuhei Tanakamaru, Yuki Yanagihara and Ken Takeuchi, “Over 10-times Extended Lifetime, 76% Reduced Error Solid-State Drives (SSDs) with Error Prediction LDPC Architecture and Error Recovery Scheme,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 424-425, February 2012.
Teruyoshi Hatanaka, Koh Johguchi and Ken Takeuchi, “A 3D-Integration Method to Compensate Output Voltage Degradation of Boost Converter for Compact Solid-State-Drives,” IEEE International Conference on 3D System Integration (3D IC), January 2012.
Koh Johguchi, Toshimichi Shintani, Takahiro Morikawa, Kazuaki Yoshioka and Ken Takeuchi, “Temperature Controlling Set Method for Multi-Level Cell Phase Change Memories: x10 Fast Write, 80% Energy Saving,” IEEE Non-Volatile Memory Technology Symposium (NVMTS), November 2011.
Ken Takeuchi, “Highly reliable Low Power Storage Class Memory & NAND Flash Memory Hybrid Solid-State Drive (SSD),” IEEE Non-Volatile Memory Technology Symposium (NVMTS), November 2011. 【招待講演】
T. Yokota, T. Sekitani, T. Nakagawa, Y. Noguchi, K. Takeuchi, U. Zschieschang, H. Klauk and T. Someya, “Control of switching voltage of low voltage organic complementary inverter using floating gate structure,” International Conference on Solid State Devices and Materials (SSDM), September 2011.
Xizhen Zhang, Mitsue Takahashi, Ken Takeuchi, and Shigeki Sakai, “First 64kb Ferroelectric-NAND Flash Memory Array with 7.5 V Program, 108 Endurance and Long Data Retention,” International Conference on Solid State Devices and Materials (SSDM), pp. 975-976, September 2011.
Koh Johguchi, Teruyoshi Hatanaka and Ken Takeuchi, “Adaptive Through-Silicon-Via Control with Clustering for 3D Solid-State-Drive Boost Converter System,” International Conference on Solid State Devices and Materials (SSDM), pp. 1057-1058, September 2011.
Kousuke Miyaji, Chinglin Hung and Ken Takeuchi, “Pushing Scaling Limit Due to Short Channel Effects and Channel Boosting Leakage from 13nm to 8nm with SOI NAND Flash Memory Cells,” International Conference on Solid State Devices and Materials (SSDM), pp. 128-129, September 2011.
Kazuhide Higuchi, Kousuke Miyaji, Koh Johguchi and Ken Takeuchi, “50nm HfO2 ReRAM with 50-Times Endurance Enhancement by Set/Reset Turnback Pulse & Verify Scheme,” International Conference on Solid State Devices and Materials (SSDM), pp. 1101-1102, September 2011.
Yasuhiro Shinozuka, Kousuke Miyaji and Ken Takeuchi, “A Zero Additional Process to Standard CMOS, 8F2, Scalable Embedded Flash Memory with Drain-side Assisted Erase Scheme,” International Conference on Solid State Devices and Materials (SSDM), pp. 981-982, September 2011.
Kousuke Miyaji, Yasuhiro Shinozuka, Shinji Miyano and Ken Takeuchi, “Statistical VTH Shift Variation Self-Convergence Scheme Using Near Threshold VWL Injection for Local Electron Injected Asymmetric Pass Gate Transistor SRAM,” IEEE Custom Integrated Circuits Conference (CICC), No. T9, September 2011.
Mitsue Takahashi, Xizhen Zhang, Le Van Hai, Kang Yan, Wei Zhang, Kousuke Miyaji, Ken Takeuchi and Shigeki Sakai, “NAND Flash Memory by Ferroelectric-Gate Field -Effect-Transistor Integration,” ] International Symposium on Integrated Functionalities (ISIF), August 2011.
Ken Takeuchi, “Green High Performance Storage Class Memory & NAND Flash Memory Hybrid SSD System,” IEEE International Symposium on Low Power Electronics and Design (ISLPED), pp.369-370, August 2011. 【招待講演】
Ken Takeuchi, “ReRAM as High-Speed and High Capacity Storage Class Memory,” IEEE Symp. on VLSI Circuits, Special Evening Session: NVM Technology and New Application Opportunities, June 2011. 【招待講演】
Teruyoshi Hatanaka and Ken Takeuchi, “4-Times Faster Rising VPASS (10V), 15% Lower Power VPGM (20V), Wide Output Voltage Range Voltage Generator System for 4-Times Faster 3D-integrated Solid-State Drives,” IEEE Symp. on VLSI Circuits, pp.200-201, June 2011.
Ken Takeuchi, “NAND Flash and Storage Class Memory-integrated Hybrid Solid-State Drive (SSD),” Silicon Nanoelectronics Workshop (SNW) , Rump Session: Non-Volatile Memories for Storage Device and New Applications, June 2011. 【招待講演】
Kousuke Miyaji, Teruyoshi Hatanaka, Ryoji Yajima, Mitsue Takahashi, Shigeki Sakai and Ken Takeuchi, “Initialize & Weak-Program Erasing Scheme for Elimination of Cell VTH Shift Variation Due to History Effect in Ferroelectric (Fe)-NAND Flash Memories,” Silicon Nanoelectronics Workshop (SNW), pp.81-82, June 2011.
Xizhen Zhang, Kousuke Miyaji, Mitsue Takahashi, Ken Takeuchi, and Shigeki Sakai, “0.5V Bit-Line-Voltage Self-Boost-Programming in Ferroelectric-NAND Flash Memory,” IEEE International Memory Workshop, pp.155-158, May 2011.
Ken Takeuchi, “Storage Class Memory and Memory System Innovation - International Collaboration for Material, Device, Circuit, Signal Processing and OS Integration,” The Seventh International Nanotechnology Conference on Communication and Cooperation (INC7), May 2011.【招待講演】
Ken Takeuchi, “Future SSD Technology,” Star Visitor Seminar, Data Storage Institute, Singapore, March 2011.【招待講演】
Ken Takeuchi, “Future Nonvolatile Memory Technology,” Star Visitor Seminar, Data Storage Institute, Singapore, March 2011.【招待講演】
Shuhei Tanakamaru, Chinglin Hung, Atsushi Esumi, Mitsuyoshi Ito, Kai Li and Ken Takeuchi, “95% Lower Bit Error Rate, 35% Lower Power Intelligent Solid-State Drives (SSDs) with Asymmetric Coding and Stripe Pattern Elimination Algorithm,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 204-205, February 2011.
Ken Takeuchi, “Storage Class Memory,” 8th International Workshop on Future Information Processing Technologies ( IWFIPT ), October 2010.【招待講演】
Mayumi Fukuda, Kazuhide Higuchi, Shuhei Tanakamaru and Ken Takeuchi, “3.6-Times Higher Acceptable Raw Bit Error Rate, 97% Lower-Power, NV-RAM & NAND-Integrated Solid-State Drives (SSDs) with Adaptive Codeword ECC,” International Conference on Solid State Devices and Materials (SSDM), pp.1166-1167, September 2010.
Ken Takeuchi, “Current Status and Future Challenge of Fe-NAND/SRAM Cell Technology,” International Conference on Solid State Devices and Materials (SSDM), pp.1086-1087, September 2010. 【招待講演】
Kentaro Honda, Kousuke Miyaji, Shuhei Tanakamaru, Shinji Miyano and Ken Takeuchi, “Elimination of Half Select Disturb in 8T-SRAM by Local Injected Electron Asymmetric Pass Gate Transistor,” IEEE Custom Integrated Circuits Conference (CICC), September 2010.
Teruyoshi Hatanaka, Koichi Ishida, Tadashi Yasufuku, Shinji Miyamoto, Hiroto Nakai, Makoto Takamiya, Takayasu Sakurai and Ken Takeuchi, “A 60% Higher Write Speed, 4.2Gbps, 24-Channel 3D-Solid State Drive (SSD) with NAND Flash Channel Number Detector and Intelligent Program-Voltage Booster,” IEEE Symp. on VLSI Circuits, pp.233-234, June 2010.
Kousuke Miyaji, Shuhei Tanakamaru, Kentaro Honda, Shinji Miyano and Ken Takeuchi, “70% Read Margin Enhancement by VTH Mismatch Self-Repair in 6T-SRAM with Asymmetric Pass Gate Transistor by Zero Additional Cost, Post-Process, Local Electron Injection,” IEEE Symp. on VLSI Circuits, pp.41-42, June 2010.
Kousuke Miyaji, Shinji Noda, Teruyoshi Hatanaka, Mitsue Takahashi, Shigeki Sakai and Ken Takeuchi, “A 1.0V Power Supply, 9.5GByte/sec Write Speed, Single-Cell Self-Boost Program Scheme for Ferroelectric NAND Flash SSD,” IEEE International Memory Workshop, pp.42-45, May 2010.
Shuhei Tanakamaru, Atsushi Esumi, Mitsuyoshi Ito, Kai Li and Ken Takeuchi, “Post-manufacturing, 17-times Acceptable Raw Bit Error Rate Enhancement, Dynamic Codeword Transition ECC Scheme for Highly Reliable Solid-State Drives, SSDs,” IEEE International Memory Workshop, pp88-91, May 2010.
Ken Takeuchi, “Low Power 3D-integrated Solid-State Drive (SSD) with Adaptive Voltage Generator,” IEEE International Memory Workshop, pp.13-16, May 2010.【招待講演】
Kosuke Miyaji and Ken Takeuchi, “Advanced NAND Flash Memory Devices and Solid-State Drives,” Materials Research Society (MRS) Spring Meeting, Tutorial Session G, April 2010. 【招待講演】
Ken Takeuchi, “Ferroelectric-gate FET for Flash Memory & SRAM application,” ITRS Emerging Research Devices and Emerging Research Materials Meeting, Memory Workshop, April 2010.【招待講演】
Kosuke Miyaji, Teruyoshi Hatanaka, Shuhei Tanakamaru, Ryoji Yajima, Shinji Noda, Mitsue Takahashi and Shigeki Sakai and Ken Takeuchi, “A Ferroelectric NAND Flash Memory for Low-Power and Highly Reliable Enterprise SSDs and a Ferroelectric 6T-SRAM for 0.5V Low-Power CPU and SoC,” Materials Research Society (MRS) Spring Meeting, April 2010. 【招待講演】
Shuhei Tanakamaru, Teruyoshi Hatanaka, Ryoji Yajima, Mitsue Takahashi, Shigeki Sakai and Ken Takeuchi, “A 0.5V Operation, 32% Lower Active Power, 42% Lower Leakage Current, Ferroelectric 6T-SRAM with VTH Self-Adjusting Function for 60% Larger Static Noise Margin,” IEEE International Electron Devices Meeting (IEDM), pp. 11.7.1-11.7.4, December 2009.
Mitsue Takahashi, Shouyu Wang, Ken Takeuchi and Shigeki Sakai, “Fe-NAND Flash-memory Application of Ferroelectric Gate FETs”, F10-6, MRS (Materials Research Society) Fall Meeting, December 2009.
Shinji Noda, Teruyoshi Hatanaka, Mitsue Takahashi, Shigeki Sakai and Ken Takeuchi, “A 1.2V Operation 2.43 Times Higher Power Efficiency Adaptive Charge Pump Circuit with Optimized VTH at Each Pump Stage for Ferroelectric (Fe)-NAND Flash Memories,” pp.162-163, International Conference on Solid State Devices and Materials (SSDM), October 2009.
Ryoji Yajima, Teruyoshi Hatanaka, Mitsue Takahashi, Shigeki Sakai and Ken Takeuchi, “A Negative Word-line Voltage Step-Down Erase Pulse Scheme with ΔVTH=1/6 ΔVERASE for Enterprise SSD Application Ferroelectric (Fe)-NAND Flash Memories,” pp.1196-1197, International Conference on Solid State Devices and Materials (SSDM), October 2009.
Tadashi Yasufuku, Koichi Ishida, Shinji Miyamoto, Hiroto Nakai, Makoto Takamiya, Takayasu Sakurai and Ken Takeuchi, “Effect of Resistance of TSV’s on Performance of Boost Converter for Low Power 3D SSD with NAND Flash Memories,” IEEE International Conference on 3D System Integration (3D IC), September 2009.
Ken Takeuchi, “Solid State Drive (SSD) and Memory Subsystem Innovation,” CMOS Emerging Technologies, September 2009.【招待講演】
Teruyoshi Hatanaka, Mitsue Takahashi, Shigeki Sakai and Ken Takeuchi, “A Zero VTH Memory Cell Ferroelectric-NAND Flash Memory with 32% Read Disturb, 24% Program Disturb, 10% Data Retention Improvement for Enterprise SSD,” IEEE European Solid-State Device Research Conference (ESSDERC), pp.225-228, September 2009.
Tadashi Yasufuku, Koichi Ishida, Shinji Miyamoto, Hiroto Nakai, Makoto Takamiya, Takayasu Sakurai and Ken Takeuchi, “Inductor Design of 20-V Boost Converter for Low Power 3D Solid State Drive with NAND Flash Memories,” IEEE International Symposium on Low Power Electronics and Design (ISLPED), pp.87-91, August 2009.
Teruyoshi Hatanaka, Ryoji Yajima, Takeshi Horiuchi, Shouyu Wang, Xizhen Zhang, Mitsue Takahashi, Shigeki Sakai and Ken Takeuchi, “Ferroelectric(Fe)-NAND Flash Memory with Non-volatile Page Buffer for Data Center Application Enterprise Solid-State Drives (SSD),” IEEE Symp. on VLSI Circuits, pp.78-79, June 2009.
Shuhei Tanakamaru and Ken Takeuchi, “A 60pJ, 3-Clock Rising Time, VTH Loss Compensated Word-line Booster Circuit for 0.5V Power Supply Embedded/Discrete DRAMs”, IEEE International Memory Workshop, pp.1-2, May 2009.
Ken Takeuchi, “3D LSI Design for MEMS Application,” Japan-Taiwan CMOS MEMS Workshop, pp.113-131, March 2009.【招待講演】
Ken Takeuchi, “Memory System Innovation with SSD and Emerging Memories,” IEEE International Solid-State Circuits Conference (ISSCC), Memory Forum F-1, February 2009. 【招待講演】
Koichi Ishida, Tadashi Yasufuku, Shinji Miyamoto, Hiroto Nakai, Makoto Takamiya, Takayasu Sakurai and Ken Takeuchi, “A 1.8V 30nJ Adaptive Program-Voltage (20V) Generator for 3D-Integrated NAND Flash SSD,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 238-239, February 2009.
Teruyoshi Hatanaka, Ryoji Yajima, Shigeki Sakai, Mitsue Takahashi, Qiu-Hong Li, Takeshi Horiuchi, Shouyu Wang, Kwi-Young Yun, Makoto Takamiya, Takayasu Sakurai and Ken Takeuchi, “Highly Scalable Fe(Ferroelectric)-NAND Cell with MFIS(Metal-Ferroelectric-Insulator-Semiconductor) Structure for Sub-10 nm Tera-Bit Capacity NAND Flash Memories,” International Symposium on Secure-Life Electronics, January 2009.
Ken Takeuchi, “Solid-State Drive (SSD) and Memory System Innovation,” Shanghai Jiao Tong University?University of Tokyo Joint Symposium on Electronics, Information Technology, and Electrical Engineering, October 2008.
Ken Takeuchi, “Emerging 3D-Memory Device,” 2008 Taiwan & Japan Semiconductor Technology Forum, October 2008.【招待講演】
Ken Takeuchi, “Emerging Nanoscale Non-volatile Semiconductor Memories,” Bilateral Workshop on Nanoscale Systems, pp.6-9, July, 2008.
Ken Takeuchi, “Solid-State Drive (SSD) and Memory System Innovation,” University of Tokyo-INRIA-Ecole des Mines Paris-INRETS Joint Symposium, pp.111-139, July, 2008.
Ken Takeuchi, “Novel Co-design of NAND Flash Memory and NAND Flash Controller Circuits for sub-30nm Low-Power High-Speed Solid-State Drives (SSD),” IEEE Symp. on VLSI Circuits, pp.124-125, June 2008.
Shigeki Sakai, Mitsue Takahashi, Ken Takeuchi, Qiu-Hong Li, Takeshi Horiuchi, Shouyu Wang, Kwi-Young Yun, Makoto Takamiya, and Takayasu Sakurai, “Highly Scalable Fe(Ferroelectric)-NAND Cell with MFIS(Metal-Ferroelectric-Insulator-Semiconductor) Structure for Sub-10nm Tera-Bit Capacity NAND Flash Memories,” IEEE Non-volatile Semiconductor Memory Workshop (NVSMW), pp. 103-104, May 2008.
Ken Takeuchi, “Circuit design of NAND flash memories,” International Symposium on Secure-Life Electronics, pp. 153-159, March 2008.
Ken Takeuchi, “NAND successful as a media for SSD,” IEEE International Solid-State Circuits Conference (ISSCC), Tutorial T-7, February 2008.【招待講演】
Ken Takeuchi, “Technology overview of flash memories,” SEMI Forum 2007, Memory symposium, June 2007.【招待講演】
Ken Takeuchi, “Technological and marketing trend of NAND flash memories,” SEMI Forum 2006, Memory symposium, June 2006. 【招待講演】
Ken Takeuchi, Yasushi Kameda, Susumu Fujimura, Hiroyuki Otake, Koji Hosono, Hitoshi Shiga, Yoshihisa Watanabe, Takuya Futatsuyama, Yoshihiko Shindo, Masatsugu Kojima, Makoto Iwai, Masanobu Shirakawa, Masayuki Ichige, Kazuo Hatakeyama, Shinichi Tanaka, Teruhiko Kamei, Jia-Yi Fu, Adi Cernea, Yan Li, Masaaki Higashitani, Gertjan Hemink, Shinji Sato, Ken Oowada, Shih-Chung Lee, Naoki Hayashida, Jun Wan, Jeffrey Lutze, Shouchang Tsao, Mehrdad Mofidi, Kiyofumi Sakurai, Naoya Tokiwa, Hiroko Waki, Yasumitsu Nozawa, Kazuhisa Kanazawa and Shigeo Ohshima, “A 56nm CMOS 99mm2 8Gb Multi-level NAND Flash Memory with 10Mbyte/sec Program Throughput,” IEEE International Solid-State Circuits Conference (ISSCC), pp.144-145, February 2006.
Ken Takeuchi, “Technology trend of NAND flash memories,” SEMI Forum 2004, Memory symposium, June 2004.【招待講演】
Hiroshi Nakamura, Kenichi Imamiya, Toshihiko Himeno, Toshio Yamamura, Tamio Ikehashi, Ken Takeuchi, Kazushige Kanda, Koji Hosono, Takuya Futatsuyama, Koichi Kawai, Riichiro Shirota, Norihisa Arai, Fumitaka Arai, Kazuo Hatakeyama, Hiroaki Hazama, Masanobu Saito, Hisataka Meguro, Kevin Conley, Khandker Quader and Jian Chen, “A 125mm2 1Gb NAND Flash Memory with 10MB/s Program Throughput,” IEEE International Solid-State Circuits Conference (ISSCC), pp.106-107, February 2002.
Ken Takeuchi and Tomoharu Tanaka, “A Dual Page Programming Scheme for High-Speed Multi-Gb-Scale NAND Flash Memories,” IEEE Symp. on VLSI Circuits, pp.156-157, June 2000.
Shinji Satoh, Takuya Nakamura, Kazuhiro Shimizu, Ken Takeuchi, Hiroshi Iizuka, Seiichi Aritome, and Riichiro Shirota, “A Novel Gate-Offset NAND Cell (GOC-NAND) Technology Suitable for High-Density and Low-Voltage-Operation Flash Memories,” IEEE International Electron Devices Meeting (IEDM), pp. 271-274, December 1999.
Ken Takeuchi, Shinji Satoh, Ken-ichi Imamiya, and Koji Sakui, “A Source-line Programming Scheme for Low Voltage Operation NAND Flash Memories,” IEEE Symp. on VLSI Circuits, pp. 37-38, June 1999.
Kenichi Imamiya, Yoshihisa Sugiura, Hiroshi Nakamura, Toshihiko Himeno, Ken Takeuchi, Tamio Ikehashi, Kazushige Kanda, Koji Hosono, Riichiro Shirota, Seiichi Aritome, Kazuhiro Shimizu, Kazuo Hatakeyama, and Koji Sakui, “A 130-mm2, 256-Mbit NAND Flash with Shallow Trench Isolation Technology,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 112-113, February 1999.
Ken Takeuchi, Shinji Satoh, Tomoharu Tanaka, Ken-ichi Imamiya, and Koji Sakui, “A Negative Vth Cell Architecture for Highly Scalable, Excellently Noise-Immune, and Highly Reliable NAND Flash Memories,” IEEE Symp. on VLSI Circuits, pp. 234-235, June 1998.
Shinji Satoh, Hiroyuki Hagiwara, Toru Tanzawa, Ken Takeuchi, and Riichiro Shirota, “A Novel Isolation-Scaling Technology for NAND EEPROMs with the Minimized Program Disturbance,” IEEE International Electron Devices Meeting (IEDM), pp. 291-294, December 1997.
Ken Takeuchi, Tomoharu Tanaka, and Toru Tanzawa, “A Multipage Cell Architecture for High-Speed Programming Multilevel NAND Flash Memories,” International Workshop on Advanced LSI’s, pp. 105-110, July 1997.
Toru Tanzawa, Tomoharu Tanaka, Ken Takeuchi, and Hiroshi Nakamura, “Circuit Technology for a Single-1.8V Flash Memory,” IEEE Symp. on VLSI Circuits, pp. 63-64, June 1997.
Tomoharu Tanaka, Toru Tanzawa, and Ken Takeuchi, “A 3.4-Mbyte/sec Programming 3-Level NAND Flash Memory Savein 40% Die Size per Bit,” IEEE Symp. on VLSI Circuits, pp. 65-66, June 1997.
Ken Takeuchi, Tomoharu Tanaka, and Toru Tanzawa, “A Multipage Cell Architecture for High-Speed Programming Multilevel NAND Flash Memories,” IEEE Symp. on VLSI Circuits, pp. 67-68, June 1997.
Toru Tanzawa, Tomoharu Tanaka, Ken Takeuchi, Riichiro Shirota, Seeichi Aritome, Hiroshi Watanabe, Gertjan Hemink, Kazuhiro Shimizu, Shinji Sato, Yuji Takeuchi, and Kazunori Ohuchi, “A Compact On-Chip ECC for Low Cost Flash Memories,” IEEE Symp. on VLSI Circuits, pp. 59-60, June 1996.
Ken Takeuchi, Tomoharu Tanaka, and Hiroshi Nakamura, “A Double-Level-Vth Select Gate Array Architecture for Multilevel NAND Flash Memories,” IEEE Symp. on VLSI Circuits, pp. 69-70, June 1995.
Makoto Kuwata-Gonokami, Ryo Shimano, Toshiharu Saiki, Ken Takeuchi, and Kazuhiro Ema, “Resonant coherent optical nonlinearity of exciton and biexciton system in semiconductors,” International Quantum Electronics Conference, pp. 420-422, September 1992.
Ken Takeuchi, Toshiharu Saiki, and Makoto Kuwawa-Gonokami, “Sub-pico-second time resolved four-wave mixing spectroscopy in heteroepitaxial ZnSe thin layers,” Nonlinear Optics, pp. 513-515, August 1992.

Copyright c Takeuchi Laboratory, All Rights Reserved.