中央大学 理工学部 電気電子情報通信工学科
 中央大学 大学院理工学研究科 電気電子情報通信工学専攻 竹内研究室

Publications
International Conference Journal Book United States Patents
Japanese Patents European Patents German Patents Korean Patents
Taiwan Patents Domestic Conference Review Media
United States Patents
Ken Takeuchi, Tadashi Yasufuku, Koichi Ishida, Makoto Takamiya and Takayasu Sakurai, “Stacked structure with a voltage boosting supply circuit” , U.S.P. 8,742,838, June 3, 2014.
Hiroshi Nakamura, Kenichi Imamiya and Ken Takeuchi, “Semiconductor memory device having a plurality of chips and capability of outputting a busy signal” , U.S.P. 8,687,400, April 1, 2014.
Ken Takeuchi and Shuhei Tanakamaru, “Data input / output control device and semiconductor memory device system” , U.S.P. 8,677,217, March 18, 2014.
Hiroshi Nakamura, Ken Takeuchi, Hideko Oodaira, Kenichi Imamiya, Kazuhiro Narita, Kazuhiro Shimizu and Seiichi Aritome, “Semiconductor memory device capable of realizing a chip with high operation reliability and high yield,” U.S.P. 8,665,661, March 4, 2014.
Ken Takeuchi and Mayumi Fukuda “Data processing apparatus, control device and data storage device” , U.S.P. 8,635,511, January 21, 2014.
Ken Takeuchi, Mayumi Fukuda and Kazuhide Higuchi, “Data storage device and control device configured to control data transfer between a host device, a first storage, and a second storage” U.S.P. 8,589,764, November 19, 2013.
Ken Takeuchi, Teruyoshi Hatanaka, Koichi Ishida, Tadashi Yasufuku, Makoto Takamiya and Takayasu Sakurai, “Integrated circuit device having a plurality of integrated circuit chips and an interposer” , U.S.P. 8,514,013, August 20, 2013.
Koji Hosono, Hiroshi Nakamura, Ken Takeuchi and Kenichi Imamiya, “Nonvolatile semiconductor memory,” U.S.P. 8,472,268, June 25, 2013.
Hiroshi Watanabe, Hiroshi Nakamura, Kazuhiro Shimizu, Seiichi Aritome, Toshitake Yaegashi, Yuji Takeuchi, Kenichi Imamiya, Ken Takeuchi, and Hideko Oodaira, “Nonvolatile semiconductor memory,” U.S.P. 8,350,309, January 8, 2013.
Hiroshi Nakamura, Kenichi Imamiya and Ken Takeuchi, “Semiconductor memory device having a plurality of chips and capability of outputting a busy signal,” U.S.P. 8,331,124, December 11, 2012.
Hiroshi Nakamura, Ken Takeuchi, Hideko Oodaira, Kenichi Imamiya, Kazuhiro Narita, Kazuhiro Shimizu and Seiichi Aritome, “Semiconductor memory device capable of realizing a chip with high operation reliability and high yield,” U.S.P. 8,259,494, September 4, 2012.
Hiroshi Nakamura, Ken Takeuchi, Hideko Oodaira, Kenichi Imamiya, Kazuhiro Narita, Kazuhiro Shimizu and Seiichi Aritome, “Semiconductor memory device capable of realizing a chip with high operation reliability and high yield,” U.S.P. 8,248,849, August 21, 2012.
Tomoharu Tanaka, Hiroshi Nakamura, Ken Takeuchi, Riichiro Shirota, Fumitaka Arai and Susumu Fujimura, “Nonvolatile semiconductor memory device,” U.S.P. 8,223,558, July 17, 2012
Koji Hosono, Hiroshi Nakamura, Ken Takeuchi and Kenichi Imamiya, “Nonvolatile semiconductor memory device,” U.S.P. 8,144,513, March 27, 2012.
Hiroshi Watanabe, Hiroshi Nakamura, Kazuhiro Shimizu, Seiichi Aritome, Toshitake Yaegashi, Yuji Takeuchi, Kenichi Imamiya, Ken Takeuchi and Hideko Oodaira, "Nonvolatile semiconductor memory device,” U.S.P. 8,084,802, December 27, 2011
Tomoharu Tanaka, Hiroshi Nakamura, Ken Takeuchi, Riichiro Shirota, Fumitaka Arai and Susumu Fujimura, “Nonvolatile semiconductor memory device,” U.S.P. 8,000,147, August 16, 2011
Ken Takeuchi, Tomoharu Tanaka and Noboru Shibata, “Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells,” U.S.P. 7,969,784, June 28, 2011.
Hiroshi Nakamura, Kenichi Imamiya and Ken Takeuchi, “Semiconductor memory device having a plurality of chips and capability of outputting a busy signal,” U.S.P. 7,933,134, April 26, 2011.
Hiroshi Watanabe, Hiroshi Nakamura, Kazuhiro Shimizu, Seiichi Aritome, Toshitake Yaegashi, Yuji Takeuchi, Kenichi Imamiya, Ken Takeuchi and Hideko Oodaira, “Nonvolatile semiconductor memory,” U.S.P. 7,893,477, February 22, 2011.
Ken Takeuchi, Tomoharu Tanaka and Noboru Shibata, "Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells,” U.S.P. 7,864,592, January 4, 2011.
Koji Hosono, Hiroshi Nakamura, Ken Takeuchi and Kenichi Imamiya, "Non-volatile semiconductor memory,” U.S.P. 7,859,907, December 28, 2010.
Hiroshi Nakamura, Ken Takeuchi, Hideko Oodaira, Kenichi Imamiya, Kazuhiro Narita, Kazuhiro Shimizu and Seiichi Aritome, "Semiconductor memory device capable of realizing a chip with high operation reliability and high yield,” U.S.P. 7,787,277, April 31, 2010.
Hiroshi Nakamura, Kenichi Imamiya and Ken Takeuchi, " Semiconductor memory device having a plurality of chips and capability of outputting a busy signal,” U.S.P. 7,751,259, July 6, 2010
Tomoharu Tanaka, Hiroshi Nakamura, Ken Takeuchi, Riichiro Shirota, Fumitaka Arai and Susumu Fujimura, "Nonvolatile semiconductor memory device,” U.S.P. 7,746,707, June 29, 2010.
Yasushi Kameda, Ken Takeuchi, Hitoshi Shiga, Takuya Futatsuyama and Koichi Kawai, "Non-volatile semiconductor memory device,” U.S.P. 7,729,178, June 1, 2010.
Hiroshi Nakamura, Kenichi Imamiya and Ken Takeuchi, “Semiconductor memory device having a plurality of chips and capability of outputting a busy signal,” U.S.P. 7,663,967, February 16, 2010.
Koji Hosono, Hiroshi Nakamura, Ken Takeuchi and Kenichi Imamiya, “Non-volatile semiconductor memory,” U.S.P. 7,639,544, December 29, 2009.
Kazushige Kanda, Kenichi Imamiya, Hiroshi Nakamura, Ken Takeuchi and Tamio Ikehashi, “Semiconductor device, nonvolatile memory, system including a plurality of semiconductor memories, electric card including semiconductor device or nonvolatile semiconductor memory, and electric device with which this electric card can be used,” U.S.P. 7,633,826, December 15, 2009.
Hiroshi Nakamura, Kenichi Imamiya and Ken Takeuchi, “Semiconductor memory device having a plurality of chips and capability of outputting a busy signal," U.S.P. 7,596,042, September 29, 2009.
Koji Hosono, Hiroshi Nakamura, Ken Takeuchi and Kenichi Imamiya, “Sense amplifier circuit in non-volatile semiconductor memory comprising a boosting capacitor for boosting the potential at sense node," U.S.P. 7,567,463, July 28, 2009.
Hiroshi Nakamura, Kenichi Imamiya and Ken Takeuchi, “Semiconductor memory device having a plurality of chips and capability of outputting a busy signal,” U.S.P. 7,542,323, June 2, 2009.
Hiroshi Nakamura, Kenichi Imamiya and Ken Takeuchi, “Semiconductor memory device having a plurality of chips and capability of outputting a busy signal,” U.S.P. 7,522,442, August 21, 2009.
Hiroshi Maejima, Katsuaki Isobe, Takumi Abe, Ken Takeuchi, “NAND type flash memory,” U.S.P. 7,518,922, April 14, 2009.
Ken Takeuchi, “Nonvolatile semiconductor memory,” U.S.P. 7,492,643, February 17, 2009.
Ken Takeuchi, “Semiconductor memory device,” U.S.P. 7,489,010, February 10, 2009.
Ken Takeuchi, “Semiconductor memory device,” U.S.P. 7,426,141, September 16, 2008.
Hiroshi Watanabe, Hiroshi Nakamura, Kazuhiro Shimizu, Seiichi Aritome, Toshitake Yaegashi, Yuji Takeuchi, Kenichi Imamiya, Ken Takeuchi and Hideko Oodaira, “Nonvolatile semiconductor memory,” U.S.P. 7,425,739, September 16, 2008.
Ken Takeuchi, Takuya Futatsuyama and Koichi Kawai, “Nonvolatile memory cell having current compensated for temperature dependency and data read method thereof,” U.S.P. 7,411,830, August 12, 2008.
Ken Takeuchi, "Semiconductor integrated circuit device,” U.S.P. 7,411,819, August 12, 2008.
Ken Takeuchi, Tomoharu Tanaka and Noboru Shibata, “Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells,” U.S.P. 7,394,695, July 1, 2008.
Koji Hosono, Hiroshi Nakamura, Ken Takeuchi and Kenichi Imamiya, “Sense amplifier circuit in non-volatile semiconductor memory comprising a boosting capacitor for boosting the potential at sense node,” U.S.P. 7,379,340, May 27, 2008.
Hiroshi Nakamura, Ken Takeuchi, Hideko Oodaira, Kenichi Imamiya, Kazuhiro Narita, Kazuhiro Shimizu and Seiichi Aritome, “Semiconductor memory device capable of realizing a chip with high operation reliability and high yield,” U.S.P. 7,359,228, April 15, 2008.
Takuya Futatsuyama and Ken Takeuchi, “Semiconductor memory device and memory card,” U.S.P. 7,352,625, April 1, 2008.
Ken Takeuchi, Tomoharu Tanaka and Noboru Shibata, “Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells,” U.S.P. 7,342,825, March 11, 2008.
Hiroshi Watanabe, Hiroshi Nakamura, Kazuhiro Shimizu, Seiichi Aritome, Toshitake Yaegashi, Yuji Takeuchi, Kenichi Imamiya, Ken Takeuchi and Hideko Oodaira, “Nonvolatile semiconductor memory,” U.S.P. 7,332,762, February 19, 2008.
Yasushi Kameda, Ken Takeuchi, Hitoshi Shiga, Takuya Futatsuyama and Koichi Kawai, “Non-volatile semiconductor memory device,” U.S.P. 7,327,616, February 5, 2008.
Kazushige Kanda, Kenichi Imamiya, Hiroshi Nakamura, Ken Takeuchi and Tamio Ikehashi, “Semiconductor device, nonvolatile memory, system including a plurality of semiconductor memories, electric card including semiconductor device or nonvolatile semiconductor memory, and electric device with which this electric card can be used,” U.S.P. 7,317,652, January 8, 2008.
Ken Takeuchi, Tamio Ikehashi and Toshihiko Himeno, “Non-volatile semiconductor memory,&rdquot; U.S.P. 7,313,022, December 25, 2007.
Tomoharu Tanaka, Hiroshi Nakamura, Ken Takeuchi, Riichiro Shirota, Fumitaka Arai and Susumu Fujimura, “Nonvolatile semiconductor memory device,” U.S.P. 7,310,270, December 18, 2007.
Takuya Futatsuyama and Ken Takeuchi, “Level shifter circuit and semiconductor memory device,” U.S.P. 7,274,603, September 25, 2007.
Ken Takeuchi, “Non-volatile semiconductor memory device,” U.S.P. 7,269,073, September 11, 2007.
Ken Takeuchi, “Non-volatile semiconductor memory device,” U.S.P. 7,242,616, July 10, 2007.
Ken Takeuchi, “Nonvolatile semiconductor memory device,” U.S.P. 7,224,617, May 29, 2007.
Tomoharu Tanaka, Hiroshi Nakamura, Ken Takeuchi, Riichiro Shirota, Fumitaka Arai and Susumu Fujimura, “Nonvolatile semiconductor memory device,” U.S.P. 7,224,612, May 29, 2007.
Ken Takeuchi, Tomoharu Tanaka and Noboru Shibata, “Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells,” U.S.P. 7,196,932, March 27, 2007.
Ken Takeuchi, Tomoharu Tanaka and Noboru Shibata, “Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells,” U.S.P. 7,177,196, February 13, 2007.
Hiroshi Nakamura, Ken Takeuchi, Hideko Oodaira, Kenichi Imamiya, Kazuhiro Narita, Kazuhiro Shimizu and Seiichi Aritome, “Semiconductor memory device capable of realizing a chip with high operation reliability and high yield,” U.S.P. 7,151,685, December 19, 2006.
Kazushige Kanda, Kenichi Imamiya, Hiroshi Nakamura, Ken Takeuchi and Tamio Ikehashi, “Semiconductor device, nonvolatile memory, system including a plurality of semiconductor memories, electric card including semiconductor device or nonvolatile semiconductor memory, and electric device with which this electric card can be used,” U.S.P. 7,057,947, June 6, 2006.
Koji Hosono, Hiroshi Nakamura, Ken Takeuchi and Kenichi Imamiya, “Data reprogramming/retrieval circuit for temporarily storing programmed/retrieved data for caching and multilevel logical functions in an EEPROM,” U.S.P. 7,009,878, March 7, 2006.
Hiroshi Nakamura, Ken Takeuchi, Hideko Oodaira, Kenichi Imamiya, Kazuhiro Narita, Kazuhiro Shimizu and Seiichi Aritome, “Semiconductor memory device capable of realizing a chip with high operation reliability and high yield,” U.S.P. 7,002,845, February 21, 2006.
Hiroshi Nakamura, Kenichi Imamiya and Ken Takeuchi, “Semiconductor memory device having a plurality of chips and capability of outputting a busy signal,” U.S.P. 6,990,003, January 24, 2006.
Hiroshi Watanabe, Hiroshi Nakamura, Kazuhiro Shimizu, Seiichi Aritome, Toshitake Yaegashi, Yuji Takeuchi, Kenichi Imamiya, Ken Takeuchi and Hideko Oodaira, “Nonvolatile semiconductor memory,” U.S.P. 6,974,979, December 13, 2005.
Ken Takeuchi, Tamio Ikehashi and Toshihiko Himeno, “Non-volatile semiconductor memory,” U.S.P. 6,970,388, November 29, 2005.
Tomoharu Tanaka, Hiroshi Nakamura, Ken Takeuchi, Riichiro Shirota, Fumitaka Arai and Susumu Fujimura, “Nonvolatile semiconductor memory device,” U.S.P. 6,940,752, September 6, 2005.
Koji Hosono, Hiroshi Nakamura, Ken Takeuchi and Kenichi Imamiya, “Non-volatile semiconductor memory,” U.S.P. 6,937,510, August 30, 2005.
Koji Hosono, Tamio Ikehashi, Tomoharu Tanaka, Kenichi Imamiya, Hiroshi, Nakamura and Ken Takeuchi, “Fail number detecting circuit,” U.S.P. 6,859,401, February 22, 2005.
Hiroshi Nakamura, Ken Takeuchi, Hideko Oodaira, Kazuhito Narita, Kazuhiro Shimizu and Seiichi Aritome, "Semiconductor memory device capable of realizing a chip with high operation reliability and high yield,” U.S.P. 6,836,444, December 28, 2004.
Tamio Ikehashi, Ken Takeuchi and Toshihiko Himeno, “Semiconductor memory device with test mode,” U.S.P. 6,819,596, November 16, 2004.
Tamio Ikehashi, Yoshihisa Sugiura, Kenichi Imamiya, Ken Takeuchi and Yoshihisa Iwata, “Semiconductor integrated circuit,” U.S.P. 6,801,060, October 5, 2004.
Tomoharu Tanaka, Hiroshi Nakamura, Ken Takeuchi, Riichiro Shirota, Fumitaka Arai and Susumu Fujimura, “Nonvolatile semiconductor memory device,” U.S.P. 6,798,698, September 28, 2004.
Hiroshi Nakamura, Kenichi Imamiya and Ken Takeuchi, “Semiconductor memory device having a plurality of chips and capability of outputting a busy signal,” U.S.P. 6,680,858, January 20, 2004.
Kazushige Kanda, Tamio Ikehashi, Ken Takeuchi and Kenichi Imamiya, “Semiconductor integrated circuit,” U.S.P. 6,674,318, January 6, 2004.
Ken Takeuchi and Tomoharu Tanaka, “Multi-level non-volatile semiconductor memory device with verify voltages having a smart temperature coefficient,” U.S.P. 6,667,904, December 23, 2003.
Koji Hosono, Tamio Ikehashi, Tomoharu Tanaka, Kenichi Imamiya, Hiroshi Nakamura and Ken Takeuchi, “Fail number detecting circuit of flash memory,” U.S.P. 6,657,896, December 2, 2003.
Ken Takeuchi, Tamio Ikehashi and Toshihiko Himeno, “Non-volatile semiconductor memory," U.S.P. 6,646,930, November 11, 2003.
Tamio Ikehashi, Ken Takeuchi and Toshihiko Himeno, “Semiconductor memory device with test mode,” U.S.P. 6,643,180, November 4, 2003.
Hiroshi Nakamura, Ken Takeuchi, Hideko Oodaira, Kenichi Imamiya, Kazuhito Narita, Kazuhiro Shimizu and Seiichi Aritome, “Semiconductor memory device capable of realizing a chip with high operation reliability and high yield,” U.S.P. 6,611,447, August 26, 2003.
Tamio Ikehashi, Yoshihisa Sugiura, Kenichi Imamiya, Ken Takeuchi and Yoshihisa Sugiura, “Semiconductor integrated circuit with a down converter for generating an internal voltage” U.S.P. 6,590,444, July 08, 2003.
Tomoharu Tanaka, Hiroshi Nakamura, Ken Takeuchi, Riichiro Shirota, Fumitaka Arai and Susumu Fujimura, “Nonvolatile semiconductor memory device,” U.S.P. 6,549,464, April 15, 2003.
Tomoharu Tanaka, Kazuhiro Ohuchi, Toru Tanzawa and Ken Takeuchi, “Nonvolatile semiconductor memory device,” U.S.P. 6,545,909, April 8, 2003.
Hiroshi Watanabe, Hiroshi Nakamura, Kazuhiro Shimizu, Seiichi Aritome, Toshitake Yaegashi, Yuji Takeuchi, Kenichi Imamiya, Ken Takeuchi and Hideko Oodaira, “Nonvolatile semiconductor memory,” U.S.P. 6,512,253, January 28, 2003.
Koji Hosono, Tamio Ikehashi, Tomoharu Tanaka, Kenichi Imamiya, Hiroshi Nakamura and Ken Takeuchi, “Fail number detecting circuit of flash memory,” U.S.P. 6,507,518, January 14, 2003.
Kazushige Kanda, Tamio Ikehashi, Ken Takeuchi and Kenichi Imamiya, “Semiconductor integrated circuit,” U.S.P. 6,469,573, October 22, 2002.
Ken Takeuchi and Tomoharu Tanaka, “Voltage generator for compensating for temperature dependency of memory cell current,” U.S.P. 6,452,437, September 17, 2002.
Tomoharu Tanaka, Hiroshi Nakamura, Ken Takeuchi, Riichiro Shirota, Fumitaka Arai, and Susumu Fujimura, “Nonvolatile semiconductor memory device,” U.S.P. 6,434,055, August 13, 2002.
Hiroshi Nakamura, Ken Takeuchi, Hideko Oodaira, Kenichi Imamiya, Kazuhiro Narita, Kazuhiro Shimizu and Seiichi Aritome, “Semiconductor memory device capable of realizing a chip with high operation reliability and high yield,” U.S.P. 6,424,588, July 23, 2002.
Koji Hosono, Yasuo Itoh and Ken Takeuchi, “Internal voltage generating circuit capable of generating variable multi-level voltages,” U.S.P. 6,404,274, June 11, 2002.
Ken Takeuchi, Tomoharu Tanaka and Noboru Shibata, “Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells,” U.S.P. 6,374,746, April 16, 2002.
Tomoharu Tanaka, Kazunori Ohuchi, Toru Tanzawa, and Ken Takeuchi, “Nonvolatile semiconductor memory device,” U.S.P. 6,363,010, Mar 26, 2002.
Hiroshi Watanabe, Hiroshi Nakamura, Kazuhiro Shimizu, Seiichi Aritome, Toshitake Yaegashi, Yuji Takeuchi, Kenichi Imamiya, Ken Takeuchi and Hideko Oodaira, “Nonvolatile semiconductor memory,” U.S.P. 6,353,242, March 5, 2002.
Tamio Ikehashi, Yoshihisa Sugiura, Kenichi Imamiya, Ken Takeuchi and Yoshihisa Iwata, “Semiconductor integrated circuit having active mode and standby mode converters,” U.S.P. 6,351,179, Feb 26, 2002.
Ken Takeuchi and Tomoharu Tanaka, “Nonvolatile semiconductor memory device,” U.S.P. 6,307,785, Oct 23, 2001.
Ken Takeuchi and Tomoharu Tanaka, “Nonvolatile semiconductor memory device,” U.S.P. 6,301,153, Oct 9, 2001.
Tomoharu Tanaka, Kazunori Ohuchi, Toru Tanzawa, and Ken Takeuchi, “Nonvolatile semiconductor memory device,” U.S.P. 6,282,117, August 28, 2001.
Koji Hosono, Hiroshi Nakamura, Tamio Ikehashi, Kazushige Kanda, Ken Takeuchi, Kenichi Imamiya, “Booster circuit having booster cell sections connected in parallel, voltage generating circuit and semiconductor memory which use such booster circuit,” U.S.P. 6,278,639, August 21, 2001.
Hiroshi Nakamura, Ken Takeuchi, Hideko Oodaira, Kenichi Imamiya, Kazuhito Narita, Kazuhiro Shimizu and Seiichi Aritome, “Semiconductor memory device capable of realizing a chip with high operation reliability and high yield,” U.S.P. 6,240,012, May 29, 2001.
Tomoharu Tanaka, Hiroshi Nakamura, Ken Takeuchi, Riichiro Shirota, Fumitaka Arai, Susumu Fujimura, “Nonvolatile semiconductor memory device with soft-programming to adjust erased state of memory cells,” U.S.P. 6,208,560, March 27, 2001.
Ken Takeuchi and Tomoharu Tanaka, “Nonvolatile semiconductor memory device,” U.S.P. 6,154,391, November 28, 2000.
Ken Takeuchi and Tomoharu Tanaka, “Nonvolatile semiconductor memory device,” U.S.P. 6,147,911, Nov 14, 2000.
Ken Takeuchi, “Nonvolatile semiconductor memory device capable of preventing data from being written in error,” U.S.P. 6,134,157, Oct 17, 2000.
Tomoharu Tanaka, Hiroshi Nakamura, Ken Takeuchi, Riichiro Shirota, Fumitaka Arai, Susumu Fujimura, “Nonvolatile semiconductor memory device with soft-programming to adjust erased state of memory cells,” U.S.P. 6,134,140, Oct 17, 2000.
Ken Takeuchi and Tomoharu Tanaka, “Nonvolatile semiconductor memory,” U.S.P. 6,069,823, May 30, 2000.
Ken Takeuchi and Tomoharu Tanaka, “Memory system," U.S.P. 6,064,591, May16, 2000.
Ken Takeuchi and Tomoharu Tanaka, “Nonvolatile semiconductor memory device having a data circuit for erasing and writing operations,” U.S.P. 6,055,188, April 25, 2000.
Ken Takeuchi, Koji Sakui, Tomoharu Tanaka, and Seiichi Aritome, “Nonvolatile semiconductor memory device,” U.S.P. 6,046,940, April 4, 2000.
Ken Takeuchi and Tomoharu Tanaka, “Semiconductor device and memory system,” U.S.P. 6,046,935, April 4, 2000.
Tomoharu Tanaka, Kazunori Ohuchi, Toru Tanzawa, and Ken Takeuchi, “Nonvolatile semiconductor memory device,” U.S.P. 6,044,013, March 28, 2000.
Tomoharu Tanaka and Ken Takeuchi, “Multi-level memory for verifying programming results,” U.S.P. 6,028,792, February 22, 2000.
Ken Takeuchi, Tomoharu Tanaka, and Hiroshi Nakamura, “Nonvolatile semiconductor memory device using a bit line potential raised by use of a coupling capacitor between bit lines,” U.S.P. 6,005,802, December 21, 1999.
Ken Takeuchi and Tomoharu Tanaka, “Semiconductor memory device having variable number of selected cell pages and subcell arrays,” U.S.P. 5,986,933, November 16, 1999.
Tomoharu Tanaka, Kazunori Ohuchi, Toru Tanzawa, and Ken Takeuchi, “Nonvolatile semiconductor memory device,” U.S.P. 5,969,985, October 19, 1999.
Ken Takeuchi, Koji Sakui, Tomoharu Tanaka, and Seiichi Aritome, “Nonvolatile semiconductor memory device," U.S.P. 5,940,321, August 17, 1999.
Ken Takeuchi and Tomoharu Tanaka, “Nonvolatile semiconductor memory device,” U.S.P. 5,920,507, July 6, 1999.
Toru Tanzawa, Tomoharu Tanaka, and Ken Takeuchi, “Semiconductor memory device and high-voltage switching circuit,” U.S.P. 5,909,398, June 1, 1999.
Toru Tanzawa, Ken Takeuchi, and Tomoharu Tanaka, “Semiconductor memory,” U.S.P. 5,905,691, May 18, 1999.
Ken Takeuchi and Tomoharu Tanaka, “Semiconductor device and memory system,” U.S.P. 5,903,495, May 11, 1999.
Toru Tanzawa, Tomoharu Tanaka, and Ken Takeuchi, “Nonvolatile semiconductor memory with temperature compensation for read/verify referencing scheme,” U.S.P. 5,864,504, January 26, 1999.
Ken Takeuchi and Tomoharu Tanaka, “Memory system,” U.S.P. 5,844,841, December 1, 1998.
Toru Tanzawa, Tomoharu Tanaka, and Ken Takeuchi, “Semiconductor memory device and high-voltage switching circuit,” U.S.P. 5,828,621, October 27, 1998.
Ken Takeuchi and Tomoharu Tanaka, “Nonvolatile semiconductor memory device,” U.S.P. 5,781,478, July 14, 1998.
Toru Tanzawa, Tomoharu Tanaka, and Ken Takeuchi, “Semiconductor memory device and high-voltage switching circuit,” U.S.P. 5,708,606, January 13, 1998.
Seiichi Aritome, Tomoharu Tanaka, and Ken Takeuchi, “Nonvolatile semiconductor memory device,” U.S.P. 5,698,879, December 16, 1997.
Ken Takeuchi, Koji Sakui, Tomoharu Tanaka, and Seiichi Aritome, “Nonvolatile semiconductor memory device,” U.S.P. 5,680,347, October 21, 1997.

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